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| 文章來源： 更新時間：2014/5/23 15:03:00 |
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Silabs公司的C8051F85x/6x是嵌入高效增強性8051流水線架構CPU核的MCU,25MHzs時鐘和高達25MIPS吞吐量,采用標準的8051指令集,閃存高達8KB,多達512B RAM,具有多達12路輸入ADC,2個模擬比較器和片上調試,通信接口包括UART,SPI和I2C / SMBus,工作電壓2.2V-3.6V,主要用在無刷DC馬車驅動,FTTH和FTTH網絡,傳感器接口以及照明系統,機頂盒和投映儀.本文介紹了C8051F85x/6x主要特性,框圖以及三相BLDC馬達驅動系統模型圖, C8051F850 BLDC馬達參考設計主要特性,框圖,動力板和MCU板電路圖與材料清單.
The C8051F85x/6x MCUs are an ideal fit for low-memory, low-pin count applications. These MCUs feature a highly-efficient, enhanced 8051 pipelined architecture CPU core which executes 70% of the instructions in 1-2 system clock cycles.The C8051F85x/6x family takes functional density to the next level by integrating advanced analog, digital and communication peripherals as well as precision oscillators into highly cost-effective QFN20(3 mm x 3 mm), QSOP24 and SOIC16 packages. The MCU architecture also features a patented crossbar that enables developers to choose peripherals and pinout placement based on their application needs and layout constraints without worrying about the pre-set limitations and pin conflicts - allowing usage of small pinout packages, simplifying PCB routing, minimizing PCB layers and ultimately reducing design time, lowering system cost and most importantly optimal usage of pins. These on-chip features enable developers to minimize external components resulting in significantly reduced solution cost as compared to competitive MCUs.
C8051F85x/6x主要特性:
Memory
- Up to 8 kB flash
- Flash is in-system programmable in 512-Byte sectors
- Up to 512 Bytes RAM (256 + 256)
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-intrusive in-system debug(no emulator required)
- Provides breakpoints, single stepping, inspect/modify memory and registers
12-Bit Analog-to-Digital Converter
- Up to 16 input channels
- Up to 200 ksps 12-bit mode or 800 ksps 10-bit mode
- Internal VREF or external VREF supported
Internal Low-Power Oscillator
- Calibrated to 24.5 MHz
- Low supply current
- ±2% accuracy over supply and temperature
Internal Low-Frequency Oscillator
- 80 kHz nominal operation
- Low supply current
- Independent clock source for watchdog timer
2 Analog Comparators
- Programmable hysteresis and response time
- Configurable as interrupt or reset source
- Low current
General-Purpose I/O
- Up to 18 pins
- 5 V-Tolerant
- Crossbar-enabled
High-Speed CIP-51 μC Core
- Efficient, pipelined instruction architecture
- Up to 25 MIPS throughput with 25 MHz clock
- Uses standard 8051 instruction set
- Expanded interrupt handler
Communication Peripherals
- UART
- I2C / SMBus™
- SPI™
Timer/Counters and PWM
- 4 General-Purpose 16-bit Timer/Counters
- 16-bit Programmable Counter Array (PCA) with three channels of PWM, capture/compare, or frequency output capability, and hardware kill/safe state capability
Additional Support Peripherals
- Independent watchdog timer clocked from LFO
- 16-bit CRC engine
Unique Identifier
- 32-bit unique key for each device
Supply Voltage
- 2.2 to 3.6 V
Package Options
- 16-pin SOIC
- 20-pin QFN, 3 x 3 mm
- 24-pin QSOP
- Available in die form
- Qualified to AEC-Q100 Standards
Temperature Ranges:
- –40 to +125℃(-Ix) and–40to +85℃(-Gx)
C8051F85x/6x 應用:
Brushless dc motor
Electric tools
Small appliances
Battery chargers
Optical transceiver modules (FTTH)
FTTH (Fiber-to-the-Home) networks
Sensor interfaces
Lighting systems
Motor control
Set-top boxes
Stepper motor
Projectors
圖1. C8051F85x/6x框圖
C8051F850 BLDC馬達參考設計
The Silicon Labs C8051F850 Sensorless Brushless dc (BLDC) Motor Control Reference Design is a ready to use motor control solution with production-quality hardware and software for quick evaluation and deployment in cost-sensitive applications. This reference design provides a complete system-level solution for sensorless brushless dc motors and is a vehicle for developers to evaluate and adopt low-cost BLDC motor control solutions using the C8051F85x/6x product family.
The C8051F85x/6x family is the ideal MCU for the reference design, with a 12-bit analog to digital converter, a precise internal voltage reference, two analog comparators with programmable hysteresis and response time and three independently configurable enhanced resolution PWM channels with built-in hardware kill capability.
The availability of motor control source code helps to expedite the design-in time. In addition, the motor control graphical user interface (Silicon Labs Spinner) allows real time control and monitoring of the motor and also offers users flexibility and ease of use when controlling and understanding the BLDC motor operation. A strong value proposition of the Sensorless BLDC Motor Control reference design is the supporting environment from tools, development kits, software libraries and collateral. The reference design contains everything needed to get the motor spinning in less than five minutes.
C8051F850 BLDC REFERENCE DESIGN KIT
This design kit provides a complete system-level solution for sensorless, brushless dc (BLDC) motors. This application note includes complete schematics, PCB layouts and firmware.
C8051F850 BLDC馬達參考設計主要特性:
This kit supports 3-phase BLDC motors that meet the following specifications:
Trapezoidal back-EMF
Max operating voltage of between 10 V to 24 V dc
24 kHz PWM frequency
Maximum average current of 10 A
Maximum speed not exceeding 200,000 rpm for a 2-pole BLDC motor
Overcurrent detection capability stops the motor when average current exceeds 10 A.
Motor Stall detect capability stops the motor when a motor stall is detected or extreme loads encountered.
Tachometer Frequency Generator (FG) output signal
The kit aims to demonstrate the capabilities of the C8051F850 for operating BLDC motors. The unique features offered by this MCU for BLDC motor operation are:
PWM synchronized blanking of comparator for BEMF Zero-Crossing Detection
Automatic PWM duty cycle reduction to limit motor current during startup
Hyperdrive mode to increase the maximum speed of some motors
The kit consists of the following:
One MCU Board: MCRD-MCU-C8051F850 with the motor control firmware preprogrammed into the MCU
One Powertrain Board: MCRD-PWR-NLV-F85X
One BLDC Motor: Turnigy 450 Series 3800 kV Brushless Outrunner Helicopter Motor
One Motor Mount Board
One 8-bit MCU Kit CD
One 12 V, 5 Amp Universal Input Power Adapter
圖2. C8051F850 BLDC馬達參考設計外形圖
圖3. 三相BLDC馬達驅動系統模型圖
圖4. C8051F850 BLDC馬達參考設計框圖
參考設計動力板
The powertrain board is designed to meet the following key motor specifications:
Motor supply voltage range of 10 to 24 V
Maximum average current of 10 amps
It consists of the following components that are relevant to this application:
6 IRFH7446 Power MOSFETS for the inverter circuit
3 Silicon Labs Si8230 isolated dual drivers
An LDO to generate the 3.3 V required by the MCU board
50 m current sensing resistor rated for 10 W
Motor terminal blocks to allow user to attach their own motor
Resistor divider to generate attenuated motor voltage supply (VMDC) - allows MCU to determine if motor supply voltage is high enough for safe operation
Resistor dividers to generate attenuated motor phase voltages with a small positive offset voltage (VMA,VMB,VMC)
Resistor network to generate attenuated sum of motor phase voltages with a small positive offset voltage (VMY)
參考設計MCU板
The MCU board consists of the following:
C8051F850-A-GU QSOP-24 package
2 push-buttons
3 controllable LEDs
1 rotary variable resistance potentiometer
Op-amp to amplify and bias the current sense voltage
USB Hub to support:
C2 USB debug interface
CP2103 USB-UART bridge operating at 115200 baud
CP2112 USB-I2C bridge
Configurable jumpers to select either Hall-sensored or sensorless mode of operation
Test points for connecting to gate drive of user powertrain board and motor.
圖5. 參考設計動力板電路圖(1)
圖6. 參考設計動力板電路圖(2)
圖7. 參考設計動力板電路圖(3)
圖8. 參考設計MCU板電路圖(1)
圖9. 參考設計運放電路圖
圖10. 參考設計USB橋電路圖
圖11. 參考設計USB集線器電路圖
圖12. 參考設計連接器電路圖
圖13. 低成本BLDC馬達設計案例電路圖
參考設計動力板材料清單:
參考設計MCU板材料清單:
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